Analog Neural Networks: A Path toward Ultra-Low-Power Edge AI Systems

Abstract

The increasing demand for real-time artificial intelligence (AI) on edge devices has created a need for energy-efficient and low-latency computation beyond traditional digital approaches. Analog neural networks (ANNs) offer a promising paradigm shift by leveraging the intrinsic parallelism, memory-compute integration, and low-power characteristics of analog circuits. Unlike digital accelerators, which face challenges from von Neumann bottlenecks, thermal constraints, and limited scalability, ANNs directly exploit physical properties such as current summation, charge storage, and device nonlinearity for computation. This paper provides a comprehensive study of analog neural networks as a pathway toward ultra-low-power edge AI systems, analyzing their architecture, circuit design principles, and integration challenges. Experimental evaluations demonstrate the potential of analog accelerators to reduce energy consumption by up to two orders of magnitude compared to state-of-the-art digital processors while maintaining competitive accuracy for edge inference tasks. The results highlight that ANNs are not only theoretically efficient but also practically viable, positioning them as a strong candidate for next-generation edge AI.